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Unable to allocate memory for %s at line %d.Initialization failure. Invalid L1/L2 relationship. L1 size: %lX L2 size: %lX.Initialization failure. Unknown L1 organization (%d ways).Initialization failure. L2 cache size is 0 at line %dInitialization failure. Detected Multiple L2 cache services.Cache size is larger than available test region at line %dFailure to create a cache test object at line %dError mapping system memory region at line %dCache sizing inconsistent at line %dChipset specific support failed when sizing level 2 cache at line %dThe processor appears to be in compatibility mode. The diagnostics cannot perform cache tests and performance may be very slow. Compatibility mode is a processor option under system setup.Processor CacheDell Computer Corp.This module tests level 1 (L1), level 2 (L2), and level 3 (L3) cache devices.L1 CacheThis device is a fast, small memory that enhances processor access to system memory. It is organized into two separate caches, one for data and one for code.L2 CacheThis device is a fast, small memory that works with the level 1 (L1) cache to enhance processor accesses to system memory. It is larger than the L1 cache and is 'unified' meaning it stores both code and data.L3 CacheThis device is a fast, small memory that works with the level 1 (L1) and level 2 (L2) caches to enhance processor accesses to system memory. It is larger than the L1 & L2 caches and is 'unified' meaning it stores both code and data.%ld-KB level 1 data cache%ld-KB level %u unified cache%ld-MB level %u unified cacheL1 Data Cache Pattern TestThis test writes various data patterns into the system memory such that they will be cached in the L1 data cache and then verifies the patterns are correct. This test also verifies that entries in the L1 cache are invalidated (removed from the cache) without altering the data in system memory.L1 Data Cache Walking Bit TestThis test moves a single bit through an 8-byte quad-word while verifying that the quad-word is properly stored in the cache.L2 Cache Pattern TestThis test writes data patterns into system memory such that they will be cached in the L2 cache and then verifies the patterns are correct. The test flushes (removes) the data from the level 1 data cache to obtain a true test of the L2 cache.L2 Cache Walking Bit TestThis test moves a single bit through an 8-byte quad-word, while verifying that the quad-word is properly stored in the cache. The test flushes (removes) the data from the level 1 data cache to obtain a true test of the L2 cache.L2 Cache MATS TestThis test sweeps through the level 2 cache reading and writing data, to verify that there are no cache addressing problems, and that newer data writes are not corrupting data already stored in previous locations.L3 Cache Pattern TestThis test writes data patterns into system memory such that they will be cached in the L3 cache and then verifies the patterns are correct. The test flushes (removes) the data from the level 1 and level 2 caches to obtain a true test of the L3 cache.L3 Cache Walking Bit TestThis test moves a single bit through an 8-byte quad-word, while verifying that the quad-word is properly stored in the cache. The test flushes (removes) the data from the level 1 and level 2 caches to obtain a true test of the L3 cache.L3 Cache MATS TestThis test sweeps through the level 3 cache reading and writing data, to verify that there are no cache addressing problems, and that newer data writes are not corrupting data already stored in previous locations.Verifying L1 data cacheVerifying address line integrityVerifying patterns %08Xh and %08XhTesting offset %08Xh through %08XhThe cache improperly changed system memory during an 'invalidate' at line %d.Cache offset %08Xh miscompare at line %d.Level 1 cache failure. Cache offset %08Xh miscompared patterns %08Xh and %08Xh.Level 2 cache failure. Cache offset %08Xh miscompared patterns %08Xh and %08Xh during %s pass.Level 2 cache failure. Cache offset %08Xh miscompare during %s pass at line %d.Level 3 cache failure. Cache offset %08Xh miscompared patterns %08Xh and %08Xh during %s pass.Level 3 cache failure. Cache offset %08Xh miscompare during %s pass at line %d.firstsecondCacheSERVICE_GET_RSVD_MEM_SELSERVICE_GET_RSVD_MEM_SELCache cannot locate %sSERVICE_GET_RSVD_MEM_PAGESSERVICE_GET_RSVD_MEM_PAGESCache cannot locate %sReserved Selector = 0x%04X Reserved Area Size = %uNo caches reported through CPUID instructionNo cache operation detectedcMchModuleSERVICE_SMIcL1CachecL2CachecL3Cache%s %s DIAGS 998 998 %s Cache MODULE_HELP DIAGS_INIT Fail Unable to allocate memory.L1 CacheSize = 0x%08XL2 CacheSize = 0x%08XL3 CacheSize = 0x%08XL1 Way Count = %uL2 Way Count = %uL3 Way Count = %uL1 Line Size = %uL2 Line Size = %uL3 Line Size = %uSERVICE_GET_L2_CACHE_SIZECache:Trc: No GET_L2_CACHE_SIZE service foundCache:Trc: Using GET_L2_CACHE_SIZE serviceCache:Warning: Processor does not support cmpxch8b instructionCacheCacheCache L2 Data Selector 1:0x%04X Base Address:0x%08XCache L2 Data Selector 2:0x%04X Base Address:0x%08XCache L2 Data Selector 3:0x%04X Base Address:0x%08XCache:Config: %sCacheCacheCacheL3 Size = 0x%08XCache L3 Data Selector 1:0x%04X Base Address:0x%08XCache L3 Data Selector 2:0x%04X Base Address:0x%08XCache L3 Data Selector 3:0x%04X Base Address:0x%08XCache:Config: %sCacheCacheCacheUnable to allocate memory for error message.DevVirt.cppInvalid pointer specified (pModuleName:%p).Help.cppInvalid pointer specified (pVendorName:%p).Help.cppInvalid pointer specified (pModuleVersion:%p).Help.cppInvalid pointer specified (pModuleHelpStr:%p).Help.cppInvalid pointer specified (pcDeviceHelp:%p).Help.cppAttempt to add a device help object (%s) to more than one module help object.Help.cppInvalid pointer specified (pDeviceName:%p).Help.cppInvalid pointer specified (pDeviceMnemonic:%p).Help.cppInvalid pointer specified (pDeviceHelpStr:%p).Help.cppInvalid pointer specified (pcTestHelp:%p).Help.cppAttempt to add a test help object (%s) to more than one device help object.Help.cppInvalid pointer specified (pcParamHelp:%p).Help.cppAttempt to add a parameter help object (%s) to more than one device help object.Help.cppInvalid pointer specified (pTestName:%p).Help.cppInvalid pointer specified (pTestMnemonic:%p).Help.cppInvalid pointer specified (pTestHelpStr:%p).Help.cppInvalid pointer specified (pParamPrompt:%p).Help.cppInvalid pointer specified (pParamMnemonic:%p).Help.cppInvalid pointer specified (pParamHelpStr:%p).Help.cppSERVICE_EMS%s %s DIAGS 999 999 %s FIND_EMS_SVC DIAGS_INIT Fail The Error Messaging Service (Ver 2) could not be located.   "@#@, @9 ; A B C D E f@g@h @y@z@{@|@    @@GenuineIntel@-!MHCCCE|FFFFFG$G@G\GFF,A*MHCCCE|FFFFFG$G@G\GFFA+8MHCCCE|FFFFFG$G@G\GFFHCkBBBB4E"yMHCCCE|FFFFFG$G@G\GFFH I'ICI_I{IIII(JDJ`J|JLKKKKKGKcKHLdLLL7OSOoOOOLRRR S(SDSLtTTTTTLV9VUVqVVV(h  *:FR  *:FRmsvcrt.dll??2@YAPAXI@Z??3@YAXPAX@Z_onexit_purecall_daylight_environsprintfstrcatstrcpystrlen_sys_errlist_sys_nerr_timezone_tznameP(8HDDD8DZ`frCache.mdmfExitfInitfModuleHelpfStartUp 0060;0@0F0z000000003181>1u1z11111122;222y3~3G4L4465<5A5G5555555B6J6P6666677W7_7e7777888l8t8z8888&9.949p9x9;&;,;;;;;;;<<<1<6<<======>??#?h?????? 0J0O0W0]000000`1f1x1111%2-2S22[3a3s3333=4444{5566666666677777T8Y8a8g88888<9G9`9k9999K:Q:c:;&;,;2;+<8===>i>o>u>>??T?\???00000111h2n2t2o3{33334444445 5555566g6l6t6z66666O7Z7s7~7777^8d8v8$999?9E9n:{::::i;o;;9g>y>???@0O0W012252R2Z2|2233a4i4q444444&55555m7u777778 888+8<8}8888889:: ;;9;<%=B=I=N=T=}===========>w>~>>>>>>>??P00070A0F0L0u00001111N1X1]1c1112292C2H2N2y33333333344!4'4565@5E5K5t5~555555566 77:7B7c7k7779y9999N=V=^=`44839`;;<=~0pL9P9T9X9\9`9d9h9l9p9t9x9|999999999999999999999999999999999::: ::::: :$:(:,:0:4:8:<:@:D:H:4c47799$969<9B9H9 8$8(8,8084888<8@8D8H8L8P8T8X8\8`8d8h8l8p8t8x8|888888888888888888888888888888888999 99999 9$9(9,9094989<9@9D9H9L9P9T9X9\9`9d9h9l9p9t9x9|999999999999999999999999999999999::: ::::[Version] V1109.0 [Dependency] caci437.mdm cacvesuv.mdm usb.mdm smi.mdm